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? 2006 microchip technology inc. ds21989a-page 1 mcp1256/7/8/9 features ? inductorless 1.5x, 2x boost dc/dc converter ? output voltage: 3.3v ? high output voltage accuracy: - 3.0% (v out fixed) ? output current up to 100 ma ?20mv pp output voltage ripple ? thermal shutdown and short circuit protection ? uses small ceramic capacitors ? switching frequency: 650 khz ? low-power sleep mode: mcp1256/7 ? bypass mode: mcp1258/9 ? low-power shutdown mode: 0.1 a (typical) ? shutdown input compatible with 1.8v logic ?v in range: 1.8v to 3.6v ? soft-start circuitry to minimize inrush current ? temperature range: -40c to +125c ? packaging: - 10-pin, 3 mm x 3 mm dfn -10-pin, msop applications ? pagers ? portable measurement instruments ? home automation products ?picmicro ? mcu bias typical application description the mcp1256, mcp1257, mcp1258 and mcp1259 are inductorless, positive regulated charge pump dc/dc converters. the devices generate a regulated 3.3v output voltage from a 1.8v to 3.6v input. the devices are specifically designed for applications operating from 2-cell alkaline, ni-cd, or ni-mh batteries or by one primary lithium mno2 (or similar) coin cell battery. the mcp1256, mcp1257, mcp1258 and mcp1259 provide high efficiency by automatically switching between 1.5x and 2x boost operation. in addition, at light output loads, the mcp1256 and mcp1257 can be placed in a sleep mode, lowering the quiescent current while maintaining the regulated output voltage. alternatively, the mcp1258 and mcp1259 provide a bypass feature connecting the input voltage to the output. this allows for real-time clocks, microcontrollers or other system devices to remain biased with virtually no current being consumed by the mcp1258 or mpc1259. in normal operation, the output voltage ripple is below 20 mv pp at load currents up to 100 ma. normal opera- tion occurs at a fixed switching frequency of 650 khz, avoiding interference with sensitive if bands. the mcp1256 and mcp1258 feature a power-good output that can be used to detect out-of-regulation conditions. the mcp1257 and mcp1259 feature a low- battery indication that issues a warning if the input voltage drops below a preset voltage threshold. extremely low supply current and few external parts (4 capacitors) make these devices ideal for small, battery- powered applications. a shutdown mode is also provided for further power reduction. the devices incorporate thermal and short-circuit pro- tection. two package offerings are provided: 10-pin msop and 10-lead 3 mm x 3 mm dfn. the devices are completely characterized over the junction temper- ature range of -40c to +125c. pgood gnd shdn 1 2 3 4 mcp1256 v out 5 6 7 8 9 10 v in sleep c in 10 f c out 10 f c 1 - c 1 + c 1 1 f c 2 - c 2 + c 2 1 f r 1 input 1.8v to 3.6v output 3.3v power-good indication on / off typical application with power-good indication regulated 3.3v, low-ripple charge pump with low- operating current sleep mode or bypass mode
mcp1256/7/8/9 ds21989a-page 2 ? 2006 microchip technology inc. package pinouts functional block diagram table 1: switch logic pgood 1 2 3 4 mcp1258 56 7 8 9 10 bypass lbo 1 2 3 4 56 7 8 9 10 bypass mcp1259 c 1 - c 2 - pgood gnd shdn 1 2 3 4 mcp1256 c 1 + v out c 2 + 5 6 7 8 9 10 v in sleep lbo 1 2 3 4 56 7 8 9 10 sleep mcp1257 c 2 - c 1 + v out c 2 - c 1 + v out c 2 - c 1 + v out c 1 - gnd shdn c 2 + v in c 1 - gnd shdn c 2 + v in c 1 - gnd shdn c 2 + v in s1 s2 s3 s4 s5 s7 s6 + - 1.5x, 2x mode comparator 840 k 720k d q s5,s7 s6 s4 s1,s3,ce gate drives v in c 2 -c 2 +c 1 -c 1 + v out gnd 480 k 840 k + - feedback amplifier v out ce bandgap ref. 650 khz osc. mode phase oscillator q s1 s2(ce) s3 s4 s5 s6 s7 1.5x charging h l h h h l h l h 1.5x transfer l l l l l h l h l 2x charging h h h h h l l h l 2x transfer l h l l l h l h l bypass ? ? ? h l h h h l l legend: l is logic low, h is logic high
? 2006 microchip technology inc. ds21989a-page 3 mcp1256/7/8/9 1.0 electrical characteristics absolute maximum ratings? power supply voltage, v in ...............................................3.8v voltage on any pin w.r.t. gnd ................. -0.3v to (v in +0.3v) output short circuit duration ................................continuous storage temperature range .........................-65c to +150c ambient temperature with power applied ....-55c to +125c maximum junction temperature ................................. +150c esd protection on all pins human body model (1.5 k in series with 100 pf) ....... 2kv machine model (200 pf, no series resistance) .............200v ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this s pecification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. dc characteristics electrical specifications: unless otherwise indicated, all limits apply for v in = 1.8v to 3.6v, shdn = v in , c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, t j = -40c to +125c. typical values are at t j = +25c. parameters sym min typ max unit s conditions all devices supply voltage v in 1.8 ? 3.6 v output voltage v out ?3.3?v output voltage accuracy v out -3.0 0.5 +3.0 % i out = 10 ma to i out(max) output current i out(max) 30 ? ? ma 1.8v < v in < 2.0v 70 ? ? ma 2.0v < v in < 2.2v 100 ? ? ma 2.2v < v in < 3.6v short circuit current i sc ? 150 ? ma v out = 0v, v in = 1.8v to 3.6v power efficiency ? 84.5 ? % v in = 1.8v, i out = 10 ma ? 84.5 ? % v in = 1.8v, i out = 50 ma ? 76.4 ? % v in = 2.0v, i out = 10 ma ? 80.1 ? % v in = 2.0v, i out = 50 ma ? 64.0 ? % v in = 2.4v, i out = 10 ma ? 67.1 ? % v in = 2.4v, i out = 50 ma ? 67.5 ? % v in = 2.4v, i out = 100 ma ? 69.7 ? % v in = 2.8v, i out = 10 ma ? 76.0 ? % v in = 2.8v, i out = 50 ma ? 76.7 ? % v in = 2.8v, i out = 100 ma ? 65.0 ? % v in = 3.0v, i out = 10 ma ? 71.0 ? % v in = 3.0v, i out = 50 ma ? 71.6 ? % v in = 3.0v, i out = 100 ma shutdown input - shdn shdn input voltage low v il(shdn ) ??0.4v shdn input voltage high v ih(shdn ) 1.4 ? ? v shdn input leakage current i lk(shdn ) ? 0.001 0.1 a shdn quiescent current i q ?0.25 2 av shdn = 0v, t j = +25c thermal shutdown thermal shutdown threshold t j ? 160 ? c thermal shutdown hysteresis t j(hys) ?15? c
mcp1256/7/8/9 ds21989a-page 4 ? 2006 microchip technology inc. mcp1256 and mcp1257 devices sleep mode input - sleep sleep input voltage low v il(sleep ) ??0.4v sleep input voltage high v ih(sleep ) 1.4 ? ? v sleep input leakage current i lk(sleep ) ? 0.001 0.1 a sleep quiescent current i q ?1020 av sleep = 0v, i out = 0 ma mcp1256 and mcp1258 devices power-good output - pgood pgood threshold v th ? 93 ? % percent of v out falling pgood hysteresis v hys ?110?mvv out rising pgood output low voltage v ol ? 25 100 mv i sink = 0.5 ma, v in = 1.8v pgood input leakage current i lk(pgood) ?0.02 1 av pgood = v in mcp1257 and mcp1259 low-battery output - lbo lbo threshold v th ?1.95?vv in falling lbo hysteresis v hys ? 240 ? mv v in rising lbo output low voltage v ol ? 25 100 mv i sink = 0.5 ma, v in = 1.8v lbo input leakage current i lk(lbo ) ?0.02 1 av lbo = v in mcp1258 and mcp1259 bypass mode input - bypass bypass input voltage low v il(bypass ) ??0.4v bypass input voltage high v ih(bypass ) 1.4 ? ? v bypass input leakage current i lk(bypass ) ? 0.001 0.1 a bypass quiescent current i q ?0.25 2 av bypass = 0v, i out = 0 ma, t j = +25c bypass input-to-output impedance r bypass ?1.5? v in = 2.4v dc characteristics (continued) electrical specifications: unless otherwise indicated, all limits apply for v in = 1.8v to 3.6v, shdn = v in , c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, t j = -40c to +125c. typical values are at t j = +25c. parameters sym min typ max unit s conditions
? 2006 microchip technology inc. ds21989a-page 5 mcp1256/7/8/9 temperature specifications ac characteristics electrical specifications: unless otherwise indicated, all limits apply for v in = 1.8v to 3.6v, shdn = v in , c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, t j = -40c to +125c. typical values are at t j = +25c. parameters sym min typ max units conditions all devices internal oscillator frequency f osc ? 650 ? khz output voltage ripple, v rip ?5?mvp-pc out = 10 f, i out = 10 ma normal operation ? 20 ? mvp-p c out = 10 f, i out = 100 ma ?12?mvp-pc out = 2.2 f, i out = 10 ma ?55?mvp-pc out = 2.2 f, i out = 100 ma v out wake-up time from shutdown t wkup ? 175 ? sv in = 3.0v, i out = 10 ma, s hdn = v ih(min) , v out from 0 to 90% nominal regulated output voltage mcp1256 and mcp1257 output voltage ripple, v rip ?40?mvp-pc out = 10 f, i out = 0.1 ma sleep mode ? 60 ? mvp-p c out = 10 f, i out = 4 ma ?40?mvp-pc out = 2.2 f, i out = 0.1 ma ?60?mvp-pc out = 2.2 f, i out = 4 ma mcp1258 and mcp1259 v out wake-up time from bypass t wkup ? 150 ? sv in = 3.0v, i out = 10 ma, s hdn = v ih(min) , v out from 0 to 90% nominal regulated output voltage electrical specifications: unless otherwise indicated, all limits apply for v in = 1.8v to 3.6v, shdn = v in , c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, t j = -40c to +125c. typical values are at t j = +25c. parameters sym min typ max units conditions temperature ranges specified temperature range t j -40 ? +125 c operating temperature range t j -40 ? +125 c storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 10-lead, msop ja ? 200 ? c/w 4-layer jc51-7 standard board, natural convection thermal resistance, 10-lead, dfn 3mm x 3mm ja ? 57 ? c/w 4-layer jc51-7 standard board, natural convection
mcp1256/7/8/9 ds21989a-page 6 ? 2006 microchip technology inc. 2.0 typical performance curves note: unless otherwise indicated, c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, and t a = +25c. figure 2-1: efficiency ( ) vs. output current (i out ). figure 2-2: efficiency ( ) vs. output current (i out ). figure 2-3: efficiency ( ) vs. supply voltage (v in ). figure 2-4: efficiency ( ) vs. supply voltage (v in ). figure 2-5: efficiency ( ) vs. supply voltage (v in ). figure 2-6: efficiency ( ) vs. supply voltage (v in ). note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0 10 20 30 40 50 60 70 80 90 100 10 30 50 70 90 110 130 output current (ma) efficiency (%) v in = 1.8v v in = 2.1v v in = 2.4v v in = 2.7v 0 10 20 30 40 50 60 70 80 90 10 30 50 70 90 110 130 output current (ma) efficiency (%) v in = 2.7v v in = 3.0v v in = 3.3v 0 10 20 30 40 50 60 70 80 90 100 1.82.12.42.73.03.3 input voltage (v) efficiency (%) i out = 10 ma mode transition 0 10 20 30 40 50 60 70 80 90 100 1.82.12.42.73.03.3 input voltage (v) efficiency (%) i out = 25 ma mode transition 0 10 20 30 40 50 60 70 80 90 100 1.82.12.42.73.03.3 input voltage (v) efficiency (%) i out = 50 ma mode transition 0 10 20 30 40 50 60 70 80 90 100 1.82.12.42.73.03.3 input voltage (v) efficiency (%) i out = 100 ma mode transition
? 2006 microchip technology inc. ds21989a-page 7 mcp1256/7/8/9 typical performance curves (continued) note: unless otherwise indicated, c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, and t a = +25c. figure 2-7: output voltage (v out ) vs. output current (i out ). figure 2-8: output voltage (v out ) vs. input voltage (v in ). figure 2-9: quiescent supply current (i q ) vs. output current (i out ) - normal mode. figure 2-10: quiescent supply current (i q ) vs. output current (i out ) - normal mode. figure 2-11: quiescent supply current (i q ) vs. output current (i out ) - sleep mode. figure 2-12: quiescent supply current (i q ) vs. output current (i out ) - sleep mode. 2.9 3.0 3.1 3.2 3.3 3.4 3.5 10 30 50 70 90 110 130 output current (ma) output voltage (v) v in = 1.8v v in = 3.6v v in = 2.1v 2.9 3.0 3.1 3.2 3.3 3.4 3.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 input voltage (v) output voltage (v) i out = 10 ma i out = 100 ma i out = 50 ma 1.2 1.3 1.4 1.5 1.6 1.7 1.8 012345678910 output current (ma) quiescent supply current (ma) v in = 2.4v 1.2 1.4 1.6 1.8 2.0 2.2 2.4 0 102030405060708090100 output current (ma) quiescent supply current (ma) v in = 2.4v 0 20 40 60 80 100 120 140 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 output current (ma) quiescent supply current ( a) v in = 2.4v v in = 3.0v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 02468101214161820 output current (ma) quiescent supply current (ma) v in = 2.4v v in = 3.0v
mcp1256/7/8/9 ds21989a-page 8 ? 2006 microchip technology inc. typical performance curves (continued) note: unless otherwise indicated, c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, and t a = +25c. figure 2-13: bypass impedance (r bypass ) vs. supply voltage (v in ). figure 2-14: output voltage ripple vs. time - normal 2x mode. figure 2-15: output voltage ripple vs. time - normal 2x mode. figure 2-16: output voltage ripple vs. time - normal 2x mode. figure 2-17: output voltage ripple vs. time - normal 1.5x mode. figure 2-18: output voltage ripple vs. time - normal 1.5x mode. 1.0 1.2 1.4 1.6 1.8 2.0 1.8 2.1 2.4 2.7 3.0 3.3 3.6 input voltage (v) bypass impedance ( ? ) -0.04 -0.03 -0.02 -0.01 0.00 0.01 0.02 0.03 0.04 012345678910 time ( s) output voltage ripple (v) v in = 2.4v i out = 10 ma -0.04 -0.03 -0.02 -0.01 0.00 0.01 0.02 0.03 0.04 012345678910 time ( s) output voltage ripple (v) v in = 2.4v i out = 50 ma -0.04 -0.03 -0.02 -0.01 0.00 0.01 0.02 0.03 0.04 012345678910 time ( s) output voltage ripple (v) v in = 2.4 v i out = 100 m a -0.04 -0.03 -0.02 -0.01 0.00 0.01 0.02 0.03 0.04 012345678910 time ( s) output voltage ripple (v) v in = 3.0 v i out = 10 m a -0.04 -0.03 -0.02 -0.01 0.00 0.01 0.02 0.03 0.04 012345678910 time ( s) output voltage ripple (v) v in = 3.0 v i out = 50 m a
? 2006 microchip technology inc. ds21989a-page 9 mcp1256/7/8/9 typical performance curves (continued) note: unless otherwise indicated, c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, and t a = +25c. figure 2-19: output voltage ripple vs. time - normal 1.5x mode. figure 2-20: output voltage ripple vs. time - sleep mode. figure 2-21: output voltage ripple vs. time - sleep mode. figure 2-22: output voltage ripple vs. time - sleep mode. figure 2-23: output voltage ripple vs. time - sleep mode. figure 2-24: output voltage ripple vs. time - mode transition: sleep mode-to-normal 2x mode-to-sleep mode. -0.04 -0.03 -0.02 -0.01 0.00 0.01 0.02 0.03 0.04 012345678910 time ( s) output voltage ripple (v) v in = 3.0 v i out = 100 ma -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 0 100 200 300 400 500 600 700 800 900 1000 time ( s) output voltage ripple (v) v in = 2.4v i out = 1 ma -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 0 100 200 300 400 500 600 700 800 900 1000 time ( s) output voltage ripple (v) v in = 2.4v i out = 10 m a -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 0 100 200 300 400 500 600 700 800 900 1000 time ( s) output voltage ripple (v) v in = 3.0v i out = 1 m a -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 0 100 200 300 400 500 600 700 800 900 1000 time ( s) output voltage ripple (v) v in = 3.0v i out = 10 m a 0 1 2 3 4 5 6 7 8 0 50 100 150 200 250 300 350 400 450 500 time ( s) sleep input voltage (v) -0.60 -0.50 -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 output voltage ripple (v) v in = 2.4 v i out = 10 m a
mcp1256/7/8/9 ds21989a-page 10 ? 2006 microchip technology inc. typical performance curves (continued) note: unless otherwise indicated, c in = c out = 10 f, c 1 = c 2 = 1 f, i out = 10 ma, and t a = +25c. figure 2-25: load transient response - normal 2x mode. figure 2-26: load transient response - normal 1.5x mode. figure 2-27: line transient response. figure 2-28: line transient response. 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0 50 100 150 200 250 300 350 400 450 500 time ( s) output current (a) -0.60 -0.50 -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 output voltage ripple (v) v in = 2.4v v out i out 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0 50 100 150 200 250 300 350 400 450 500 time ( s) output current (a) -0.60 -0.50 -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 output voltage ripple (v) v in = 3.0v v out i out 0 1 2 3 4 5 6 7 8 0 50 100 150 200 250 300 350 400 450 500 time ( s) input voltage (v) -0.60 -0.50 -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 output voltage ripple (v) i out = 10 ma v out v in 0 1 2 3 4 5 6 7 8 0 50 100 150 200 250 300 350 400 450 500 time ( s) input voltage (v) -0.60 -0.50 -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 output voltage ripple (v) i out = 100 ma v out v in
? 2006 microchip technology inc. ds21989a-page 11 mcp1256/7/8/9 3.0 pin description the descriptions of the pins are listed in table 3-1. table 3-1: pin function table 3.1 status indication (pgood, lbo ) 3.1.1 power-good output pin (pgood) mcp1256/8: pgood is high impedance when the out- put voltage is in regulation. a logic low is asserted when the output falls 7% (typical) below the nominal value. the pgood output remains low until v out is within 3% (typical) of its nominal value. on start-up, this pin indicates when the output voltage reaches its final value. pgood is high impedance when shdn is low or when bypass is low (mcp1258). 3.1.2 low-battery output pin (lbo ) mcp1257/9: lbo is high impedance when the input voltage is above the low-battery threshold voltage. a logic low is asserted when the input falls below the low- battery threshold voltage. the lbo output remains low until v in is above the low-battery threshold voltage plus the low-battery hysteresis voltage. lbo is high impedance when shdn is low or when bypass is low (mcp1259). 3.2 mode selection (sleep , bypass ) 3.2.1 active low sleep mode (sleep) mcp1256/7: a logic low signal applied to this pin places the device into a sleep mode of operation. in this mode, the device maintains regulation. sleep mode performs pulse skip operation reducing the current draw of the device at the expense of increased output voltage ripple. 3.2.2 active low bypass mode (bypass ) mcp1258/9: a logic low signal applied to this pin places the device into a bypass mode of operation. in this mode, the input supply voltage is connected directly to the output. 3.3 flying capacitor negative (c2-) a 1 f ceramic flying capacitor is recommended. 3.4 flying capacitor positive (c1+) a 1 f ceramic flying capacitor is recommended. 3.5 regulated output voltage (v out ) regulated 3.3v output. bypass to gnd with a minimum of 2.2 f. 3.6 flying capacitor positive (c2+) a 1 f ceramic flying capacitor is recommended. 3.7 power supply input voltage (v in ) a supply voltage of 1.8v to 3.6v is recommended. bypass to gnd with a minimum of 1 f. 3.8 flying capacitor negative (c1-) a 1 f ceramic flying capacitor is recommended. 3.9 0v reference (gnd) connect to negative terminal of and input supply. 3.10 device shut down (shdn ) a logic low signal applied to this pin disables the device. a logic high signal applied to this pin allows normal operation. pin no. symbol function dfn msop 1 1 pgood power-good indication open-drain output pin: mcp1256 and mcp1258 lbo low-battery indication open-drain output pin: mcp1257 and mcp1259 22 sleep active low sleep mode input pin: mcp1256 and mcp1257 bypass active low bypass mode input pin: mcp1258 and mcp1259 3 3 c2- flying capacitor negative pin 4 4 c1+ flying capacitor positive pin 55 v out regulated 3.3v output voltage 6 6 c2+ flying capacitor positive pin 77 v in power supply input voltage 8 8 c1- flying capacitor negative pin 9 9 gnd 0v reference 10 10 shdn active low shutdown mode input pin
mcp1256/7/8/9 ds21989a-page 12 ? 2006 microchip technology inc. 4.0 device overview the mcp1256/7/8/9 devices are positive regulated charge pumps that accept an input voltage from +1.8v to +3.6v and convert it to a regulated 3.3v output volt- age. the mcp1256/7/8/9 provide a low-cost, compact and simple solution for step-up dc/dc conversions, primarily in battery applications, that do not want to use switching regulator solutions because of emi noise and inductor size. the mcp1256/7/8/9 are designed to offer the highest possible efficiency under common operating condi- tions, i.e. v in = 2.4v or 2.8v, v out =3.3v, i out = 100 ma. a fixed switching frequency, 650 khz typically, allows for easy external filtering. the mcp1256/7 provide a unique sleep mode feature which reduces the current drawn from the input supply while maintaining a regulated bias on external peripherals. sleep mode can substantially increase battery run-time in portable applications. the mcp1258/9 provide a unique bypass mode feature which virtually eliminates the current drawn from the input supply by the device while maintaining an unregulated bias on external peripherals. bypass connects the input supply voltage to the output. all remaining functions of the device are shutdown. bypass mode can substantially increase battery run- time in portable applications. the devices supply up to 100 ma of output current for input voltages, v in , greater than or equal to 2.2v. the devices are available in small 10-pin msop or dfn packages with an operating junction temperature range of -40c to +125c. 4.1 theory of operation the mcp1256/7/8/9 devices employ a switched capac- itor charge pump to boost an input supply, v in , to a reg- ulated 3.3v output voltage. refering to the functional block diagram, the devices perform conversion and regulation in two phases: charge and transfer. when the devices are not in shutdown, sleep or bypass, the two phases are continuously cycled through. charge transfers charge from the input supply to the flying capacitors, c 1 and c 2 , connected to pins c 1 +, c 1 -, c 2 + and c 2 -, respectively. during this phase, switches s4 and s6 are closed. switch s2 controls the amount of charge transferred to the flying capacitors. the amount of charge is determined by a sample and hold error amplifier with feedback from the output voltage at the beginning of the phase. once the first phase (charge) is complete, transfer is initiated. the second phase transfers the energy from the flying capacitors to the output. the mcp1256/7/8/9 devices autonomously switch between 1.5x mode and 2x mode. this determines whether the flying capacitors are placed in parallel (1.5x mode), or remain in series (2x mode), when the energy is transferred to the out- put. the transfer mode determines which switches are closed for the transfer. both phases occur in one clock period of the internal oscillator. when the second phase (transfer) has been completed, the cycle repeats. 4.2 power efficiency the power efficiency, , is determined by the mode of operation, 1.5x mode or 2x mode. equation 4-1 and equation 4-2 are used to approximate the power effi- ciency with any significant amount of output current. at light loads, the device quiescent current must be taken into consideration. equation 4-1: equation 4-2: 4.3 shutdown mode (shdn ) driving shdn low places the mcp1256/7/8/9 in a low- power shutdown mode. this disables the charge-pump switches, oscillator and control logic, reducing the quiescent current to 0.25 a (typical). the pgood output and lbo are in a high impedance state during shutdown. 4.4 sleep mode (sleep ) the mcp1256/7 provide a unique sleep mode fea- ture. sleep mode reduces the current drawn from the input supply while maintaining a regulated bias on external peripherals. sleep mode can substantially increase battery run-time in portable applications. the regulation control is referred to as a bang-bang control due to the output being regulated around a fixed reference with some hysteresis. as a result, some amount of peak-to-peak ripple will be observed at the output independent of load current. the frequency of the output ripple, however, will be influenced heavily by the load current and output capacitance. 4.5 bypass mode (bypass ) the mcp1258/9 provide a unique bypass mode fea- ture which virtually eliminates the current drawn from the input supply by the device, while maintaining an unregulated bias on external peripherals. bypass connects the input supply voltage to the output. all remaining functions of the device are shutdown. bypass mode can substantially increase battery run- time in portable applications. 1.5x p out p in ------------- v out i out v in 1.5 i out ---------------------------------------- - v out v in 1.5 ---------------------- == = 2x p out p in ------------- v out i out v in 2 i out ------------------------------------ v out v in 2 ----------------- - == =
? 2006 microchip technology inc. ds21989a-page 13 mcp1256/7/8/9 4.6 power-good output (pgood) for the mcp1256/8 devices, the pgood output is an open-drain output that sinks current when the regulator output voltage falls below 0.93v out (typical). if the reg- ulator output voltage falls below 0.93v out (typical) for less than 200 s and then recovers, glitch immunity cir- cuits prevent the pgood signal from transitioning low. a 10 k to 1 m pull-up resistor from pgood to v out may be used to provide a logic output. if not used, connect pgood to gnd or leave unconnected. pgood is high impedance when the output voltage is in regulation. a logic low is asserted when the output falls 7% (typical) below the nominal value. the pgood output remains low until v out is within 3% (typical) of its nominal value. on start-up, this pin indicates when the output voltage reaches its final value. pgood is high impedance when shdn is low or when bypass is low (mcp1258). 4.7 low-battery output (lbo ) for the mcp1257/9 devices, the lbo output is an open-drain output that sinks current when the input voltage falls below a preset threshold. if the input volt- age falls below the preset threshold for less than 200 s and then recovers, glitch immunity circuits pre- vent the lbo signal from transitioning low. a 10 k to 1m pull-up resistor from lbo to v out may be used to provide a logic output. if not used, connect lbo to gnd or leave unconnected. lbo is high impedance when the input voltage is above the low-battery threshold voltage. a logic low is asserted when the input falls below the low-battery threshold voltage. the lbo output remains low until v in is above the low-battery threshold voltage plus the low-battery hysteresis voltage. lbo is high impedance when shdn is low or when bypass is low (mcp1259). 4.8 soft-start and short-circuit protection the mcp1256/7/8/9 devices feature fold back short- circuit protection. this circuitry provides an internal soft-start function by limiting inrush current during startup and also limits the output current to 150 ma (typical), if the output is short-circuited to gnd. the internal soft-start circuitry requires approximately 175 s, typical, from either initial power-up, release from shutdown, or release from bypass (mcp1258/9) for the output voltage to be in regulation. 4.9 thermal shutdown the mcp1256/7/8/9 devices feature thermal shutdown with temperature hysteresis. when the die temperature exceeds 160c, the device shuts down. when the die cools by 15c, the mcp1256/7/8/9 automatically turns back on again. if high die temperature is caused by out- put overload and the load is not removed, the device will turn on and off resulting in a pulsed output. 5.0 applications 5.1 capacitor selection the style and value of capacitors used with the mcp1256/7/8/9 family determine several important parameters, such as output voltage ripple and charge pump strength. to minimize noise and ripple, it is rec- ommended that low esr (0.1 ) capacitors be used for both c in and c out . these capacitors should be ceramic and should be 10 f or higher for optimum performance. if the source impedance to v in is very low, up to several megahertz, c in may not be required. alternatively, a somewhat smaller value of c in may be substituted for the recommended 10 f, but will not be as effective in preventing ripple on the v in pin. the value of c out controls the amount of output volt- age ripple present on v out . increasing the size of c out will reduce output ripple at the expense of a slower turn-on time from shutdown and a higher inrush current. the flying capacitors (c 1 and c 2 ) control the strength of the charge pump and in order to achieve the maxi- mum rated output current (100 ma), it is necessary to have at least 1 f of capacitance for the flying capaci- tor. a smaller flying capacitor delivers less charge per clock cycle to the output capacitor resulting in lower available output current. 5.2 pcb layout issues the mcp1256/7/8/9 devices transfer charge at high switching frequencies producing fast, high peak, tran- sient currents. as a result, any stray inductance in the component layout will produce unwanted noise in the system. proper board layout techniques are required to ensure optimum performance.
mcp1256/7/8/9 ds21989a-page 14 ? 2006 microchip technology inc. 6.0 typical application circuits the mcp1256/7/8/9 devices are inductorless, positive regulated, switched capacitor dc/dc converters. typical application circuits are depicted in figure 6-1. figure 6-1: typical application circuits. pgood gnd shdn 1 2 3 4 mcp1256 v out 5 6 7 8 9 10 v in sleep c in 10 f c out 10 f c 1 - c 1 + c 1 1 f c 2 - c 2 + c 2 1 f r 1 input 1.8v to 3.6v output 3.3v power-good indication on / off typical application with power-good indication lbo gnd shdn 1 2 3 4 mcp1259 v out 5 6 7 8 9 10 v in bypass c 1 - c 1 + c 2 - c 2 + r 1 input 1.8v to 3.6v output 3.3v low-battery indication on / off typical application with low-battery indication c in 10 f c 1 1 f c out 10 f c 2 1 f
? 2006 microchip technology inc. ds21989a-page 15 mcp1256/7/8/9 7.0 packaging information 7.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 1 2 3 4 56 7 8 9 10 10-lead dfn 10-lead msop example: xxxxx ywwnnn 1259e 607256 example: xxxx xyww nnn 1 2 3 4 56 7 8 9 10 1256 e607 256
mcp1256/7/8/9 ds21989a-page 16 ? 2006 microchip technology inc. 10-lead plastic dual-flat no-lead package (mf) 3x3x0.9 mm body (dfn) ? saw singulated e2 d a1 a a3 top view exposed metal pad bottom view 21 id index pin 1 e l d2 p b n area ( note 1 ) tie bar ( note 3 ) exposed ( note 2 ) k bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. inches nom .020 bsc .008 ref. 3. package may have one or more exposed tie bars at ends. 1. pin 1 visual index feature may vary, but must be locate d within the hatched area. jedec equivalent: not registered see asme y14.5m see asme y14.5m * controlling parameter revised 09-12-05 standoff number of pins overall height contact length lead width exposed pad width exposed pad length overall width lead thickness overall length notes: pitch dimension limits ( note 3 ) ( note 3 ) l d2 b e e2 d a1 a3 .051 .012 .008 .000 .112 .082 .112 min units e a n .031 .065 .016 .010 .001 .118 .094 .118 .067 .020 .015 .002 .124 .096 .124 max .035 10 .039 0.20 ref. 0.30 0.18 1.30 0.00 2.08 2.85 2.85 0.40 0.25 1.65 0.02 3.00 3.00 2.39 0.50 bsc millimeters * 0.80 min 10 0.90 nom 0.50 0.30 1.70 0.05 2.45 3.15 3.15 1.00 max 2. exposed pad varies according to die attach paddle size. contact-to-exposed pad k .008 ? ? 0.20 ? ? significant characteristic drawing no. c04-063
? 2006 microchip technology inc. ds21989a-page 17 mcp1256/7/8/9 10-lead plastic micro small outline package (un) (msop) dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010" (0.254 mm) per s ide. .037 ref f footprint notes: revised 09-16-05 * controlling parameter mold draft angle top mold draft angle bott om foot angle lead width lead thickness c b .003 .006 ? .009 dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .024 .118 bsc .118 bsc .000 .030 .193 bsc .033 min p n units .020 bsc nom 10 inches 0.95 ref ? 0.23 .009 .012 0.08 0.15 ? ? 0.23 0.30 millimeters * 0.50 bsc 0.85 3.00 bsc 3.00 bsc 0.60 4.90 bsc .043 .031 .037 .006 0.40 0.00 0.75 min max nom 1.10 0.80 0.15 0.95 max 10 5 15 5 15 ? ? ? 0 ? 8 5 ? 5 ? 15 15 jedec equivalent: mo-187 ba 8 0 bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dime nsion, usually witho ut tolerance, for information purposes only. see asme y14.5m see asme y14.5m drawing no. c04-021 e l d b p e1 n a2 1 2 c a1 a (f)
mcp1256/7/8/9 ds21989a-page 18 ? 2006 microchip technology inc. notes:
? 2006 microchip technology inc. ds21989a-page 19 mcp1256/7/8/9 appendix a: revision history revision a (march 2006) ? original release of this document.
mcp1256/7/8/9 ds21989a-page 20 ? 2006 microchip technology inc. notes:
? 2006 microchip technology inc. ds21989a-page 21 mcp1256/7/8/9 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. x /xx package temperature range device device mcp1256: positive regulated charge pump with sleep mode and power-good indication mcp1256t: positive regulated charge pump with sleep mode and power-good indication, tape and reel mcp1257: positive regulated charge pump with sleep mode and low-battery indication mcp1257t: positive regulated charge pump with sleep mode and low-battery indication, tape and reel mcp1258: positive regulated charge pump with bypass mode and power-good indication mcp1258t: positive regulated charge pump with bypass mode and power-good indication, tape and reel mcp1259: positive regulated charge pump with bypass mode and low-battery indication mcp1259t: positive regulated charge pump with bypass mode and low -battery indication, tape and reel temperature range e = -40 c to +125 c package mf = dual flat, no lead (3x3 mm body), 10-lead un = plastic micro small outline (msop), 10-lead examples: a) mcp1256-emf: e-temp, dfn package b) mcp1256t-emf: tape and reel, e-temp, dfn package c) mcp1256-eun: e-temp, msop package d) mcp1256t-eun: tape and reel, e-temp, msop package a) mcp1257-emf: e-temp, dfn package b) mcp1257t-emf: tape and reel, e-temp, dfn package c) mcp1257-eun: e-temp, msop package d) mcp1257t-eun: tape and reel, e-temp, msop package a) mcp1258-emf: e-temp, dfn package b) mcp1258t-emf: tape and reel, e-temp, dfn package c) mcp1258-eun: e-temp, msop package d) mcp1258t-eun: tape and reel, e-temp, msop package a) mcp1259-emf: e-temp, dfn package b) MCP1259T-EMF: tape and reel, e-temp, dfn package c) mcp1259-eun: e-temp, msop package d) mcp1259t-eun: tape and reel, e-temp, msop package
mcp1256/7/8/9 ds21989a-page 22 ? 2006 microchip technology inc. notes:
? 2006 microchip technology inc. ds21989a-page 23 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application m eets with your specifications. microchip makes no representations or war- ranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , micro id , mplab, pic, picmicro, picstart, pro mate, powersmart, rfpic, and smartshunt are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, migratable memory, mxdev, mxlab, picmaster, seeval, smartsensor and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, app lication maestro, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, linear active thermistor, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, piclab, pictail, powercal, powerinfo, powermate, powertool, real ice, rflab, rfpicdem, select mode, smart serial, smarttel, total endurance, uni/o, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2006, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona and mountain view, california in october 2003. the company?s quality system processes and procedures are for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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